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USART and UART
by 艾鍗學院, 2010-12-07 16:09, Views(2921)
 8250/ 16550 Regiest table
 
 
Part 2 : Serial Ports' Registers (PC's)
 
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CSRC: Clock Source Select bit
Asynchronous mode:
Don’t care. 
Synchronous mode:
1 = Master mode (clock generated internally from BRG)
0 = Slave mode (clock from external source)
 
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UART - Universal Asyncronous Receiver Transmitter
USART - Universal Syncronous Asyncronous Receiver Transmitter
 
In synchronous mode the device require both data and clock. The clock is recovered from the data or an external one which is in synchrounous with data.
In asynchronous mode the device requires only data. The data clock is internally generated and synchronised with start and stop bits embedded in the data received
 


In uart data is send byte by byte. one start bit and 1 or 2 stop bits are attached with a byte. The max speed for the data can be upto 100kps. In USART data is send in the form of blocks.
 
 
The word "asynchronous" indicates that UARTs recover character timing information from the data stream, using designated "start" and "stop" bits to indicate the framing of each character.
 
 In synchronous transmission, the clock data is recovered separately from the data stream and no start/stop bits are used. This improves the efficiency of transmission on suitable channels; more of the bits sent are data.
 
 
An asynchronous transmission sends nothing over the interconnection when the transmitting device has nothing to send; but a synchronous interface must send "pad" characters to maintain synchronism between the receiver and transmitter. The usual filler is the ASCII "SYN" character. This may be done automatically by the transmitting device.

Some chips have both synchronous and asynchronous modes. These are called USARTs (for "universal synchronous asynchronous receiver-transmitters")

Attachments
1. PC16550D.pdf (347 KB)